Cabling Design Helpers
For details of the code implementation, please see the Cabling Helpers API.
Overview
This overview provides the Cable
class, Plant
class, and
CableSystem
parent class.
Cable
The cable class calculates a provided cable’s power rating for determining the maximum number of turbines that can be supported by a string of cable.
Character Impedance (\(\Omega\))
ac_resistance
line_frequency
inductance
conductance
capacitance
Power Factor
character_impedance
character_impedance
Cable Power (\(MW\))
rated_voltage
current_capacity
power_factor
Plant
Calculates the wind farm specifications to be used for array cable design phase. The “data class” accepts either set distances between turbines and rows or calculates them based off of the number of rotor diameters specified, for example:
# First see if there is a distance defined
self.turbine_distance = config["plant"].get("turbine_distance", None)
# If not, then multiply the rotor diameter by the turbine spacing,
# an integer representation of the number of rotor diameters and covert
# to kilometers
if self.turbine_distance is None:
self.turbine_distance = (
rotor_diameter * config["plant"]["turbine_spacing"] / 1000.0
)
# Repeat the same process for row distance.
self.row_distance = config["plant"].get("row_distance", None)
if self.row_distance is None:
self.row_distance = (
rotor_diameter * config["plant"]["row_spacing"] / 1000.0
)
where config
is the configuration dictionary passed to the
array cable design phase
The cable section length for the first turbine in each string is calculated as
the distance to the substation, substation_distance
.
CableSystem
CableSystem
acts as the parent class for both
ArrayDesignSystem
and ExportDesignSystem
. As such, it
is not intended to be invoked on its own, however it provides the shared
frameworks for both cabling system.
Note
CableSystem
offers the cabling initialization and most of
the output properties such as cable_lengths_by_type
,
total_cable_lengths_by_type
, cost_by_type
,
total_phase_cost
, total_phase_time
,
detailed_output
, and most importantly design_result
.